7.22 How are hardware devices made tamper-resistant?
There are many techniques that are used to make hardware tamper-resistant (see Question 7.21). Some of these techniques are intended to thwart direct attempts at opening a device and reading information out of its memory; others offer protection against subtler attacks, such as timing attacks and induced hardware-fault attacks.
At a very high level, a few of the general techniques currently in use to make devices tamper-resistant are:
- Employing sensors of various types (for example, light, temperature, and resistivity sensors) in attempt to detect occurrences of malicious probing.
- Packing device circuitry as densely as possible (dense circuitry makes it difficult for attackers to use a logic probe effectively).
- Using error-correcting memory.
- Making use of non-volatile memory so that the device can tell if it has been reset (or how many times it has been reset).
- Using redundant processors to perform calculations, and ensuring that all the calculated answers agree before outputting a result.
- 7.1 What is probabilistic encryption?
- Contribution Agreements: Draft 1
- Contribution Agreements: Draft 2
- 7.2 What are special signature schemes?
- 7.3 What is a blind signature scheme?
- Contribution Agreements: Draft 3
- Contribution Agreements: Final
- 7.4 What is a designated confirmer signature?
- 7.5 What is a fail-stop signature scheme?
- 7.6 What is a group signature?
- 7.7 What is a one-time signature scheme?
- 7.8 What is an undeniable signature scheme?
- 7.9 What are on-line/off-line signatures?
- 7.10 What is OAEP?
- 7.11 What is digital timestamping?
- 7.12 What is key recovery?
- 7.13 What are LEAFs?
- 7.14 What is PSS/PSS-R?
- 7.15 What are covert channels?
- 7.16 What are proactive security techniques?
- 7.17 What is quantum computing?
- 7.18 What is quantum cryptography?
- 7.19 What is DNA computing?
- 7.20 What are biometric techniques?
- 7.21 What is tamper-resistant hardware?
- 7.22 How are hardware devices made tamper-resistant?